In the field of display technology, thin film transistor is generally used as a switching element to control action of a pixel unit, or as a driving element to drive the pixel unit. Depending on the property of the silicon thin film, the thin film transistor is usually divided into two kinds, i.e. amorphous silicon (a-Si) and polycrystalline silicon (poly-Si). Compared to the amorphous silicon thin film transistor, the polysilicon thin film transistor has higher electron mobility, better liquid crystal properties and fewer leakage current, and therefore a display device manufactured by using the polysilicon thin film transistor has higher resolution and faster response, which results in that polysilicon technology, especially low-temperature polysilicon technology, has gradually replaced the amorphous silicon technology and become a main aspect of the research and development in thin film transistor.
As shown in FIG. 1, an existing array substrate comprises a substrate 101 and a plurality of low-temperature polysilicon thin film transistors disposed thereon, the low-temperature polysilicon thin film transistor comprises a buffer layer 102, an active layer 103, a gate insulating layer 104, a gate electrode 105, a planarization layer 106, a source electrode 1071 and a drain electrode 1072 which are sequentially disposed on the substrate 101, wherein the source electrode 1071 and the drain electrode 1072 are connected with the active layer 103 respectively through contact via holes penetrating through the gate insulating layer 104 and the planarization layer 106. Note that the active layer 103 comprises a source contact region contacting the source electrode 1071, a drain contact region contacting the drain electrode 1072, and a semiconductor channel region between the source contact region and the drain contact region. The source contact region and the drain contact region of the active layer 103 are ion implanted, such that the source contact region and the drain contact region of the active layer 103 become conductor. Furthermore, the array substrate is also provided with a storage capacitor, a first electrode 108 of the storage capacitor can be simultaneously formed with the active layer 103, and a second electrode 109 of the storage capacitor can be simultaneously formed with the gate electrode 105.
The inventors found that, at least the following problems exist in the prior art: the process of low-temperature polysilicon thin film transistor has many disadvantages, such as poor qualified rate, complex process, high cost and the like; in the ion implantation process, the energy for implanting ions is very likely to cure the photoresist, resulting in residual photoresist and thus affecting the process of the next step; and the conventional manufacturing process of a low-temperature polysilicon thin film transistor requires up to 9 masks, thus the yield of industrial production is severely reduced and the costs are increased.